Logic 2 - Ideas and Feature Requests

Tim

(#89425)
"The trigger action can be different for every situation (sometimes
even real-time CAN decoding and trigger on some packet anomaly's). For us it would be the best solution if we can use the Saleae Logic Pro 16 to use it as a fast up to 16 channel ADC from a C/C++ program."

Tim

Ralf

At the moment only support condition like channel high/low for channels other than the rising/falling edge channel.
It would be nice that it is possible to trigger 2 channel ( or multiple ) , if one channel has a rising edge during the second channel has a falling/rising edge at the same time. ( and logic )

Tim

Merged with: Trigger of several edge

Ralf

Is it possible to trigger 2 channel ( ore multiple) , if one channel has a rising edge during the second channel has a falling/rising) edge at the same time.
At the momemt, only support condition like channel high/low for channels other than the rising/falling edge channel.

Tim

#84744
"I am looking at DMX-512 data, and the ever important thing is the BREAK that occurs every x bytes. Is there a way I can trigger on that?"

Tim

(#84024)
"I would like to monitor a nack during an I2C transaction. How do I configure the Saleae to trigger the nack and capture all the waveform."

Tim

(#82888)
"Hello. I was wondering if it was possible to stop a capture if the number of rising edges on a particular channel is not met in between trigger signals on a reference channel.

For example, on my current set up, I start the capture on the rising edge of a reference trigger signal (Channel 1). I expect the number of rising edges to be let say 100 on channel 2 in between the trigger signals on c1. If I get less than 100 rising edges on c2, then there is a potential problem with my digital logic and I would like to stop the capture so I can examine where that event happened."

NG

It would be great to be able to configure the logic analyzer trigger to stop when a specific SPI byte, or frame type of an HLA is encountered.

Tim

discuss.saleae.com/t/new-features-for-asynch-communications-panel/1592/5
"Just wanted to put in an additional vote/request for ARINC 429 decoding.

To the point about the need for ternary logic states, I have an alternate suggestion. If the signal trigger threshold issue above gets resolved then decoding could be done directly by sampling the same signal across two channels. One channel triggers at >=6.5V (0/1 threshold), and the other triggers at

Tim

discuss.saleae.com/t/new-features-for-asynch-communications-panel/1592
"The ARINC 429 protocol is an example of an asynchronous protocol which uses a 3 level signaling. The Idle state of the bus is approximately 0V. A logic 1 is represented by a signal level >= 6.5V which a logic 0 is represented by a signal level = 6.5V or 0V to

Tim

(#73604)
"Hello, I reckon the software should have the ability to search for a specific edge in the data.
For instance:
Search for FALLING edge of CH0 where CH1==HIGH and CH2 transitioned to LOW in the preceding 10 ms."

A bit a sad that Saleae is ignoring my request for 2 years now.

Tim

(#73574)
"The feature I want is the ability to trigger when the communication error occurred.

For example, Saleae Logic 2 app knows framing error occurred during transfer, when use Async Serial.
So, it would help us to debug and capture error easily, if trigger by error timing."

Tim

discuss.saleae.com/t/scripting-socket-api/108/9
"it’d be great if you could trigger on more than one line at the same time, whichever comes first."

Tim

(#68070)
"What I want to know is the following :

* Is it possible to develop a custom analyzer that can catch at the same time SPI data and GPIO states ?

* Is it possible to start the capture and analyze on the fly the data with the custom script, reject some, get only what we are interested in, and write a file on harddrive to store results ?"
---
This use case could be solved In combination with the idea post below:
ideas.saleae.com/b/feature-requests/continuously-triggering-start-mode/

Tim

discuss.saleae.com/t/please-allow-for-lower-memory-limit-and-temporary-analyzer-disable/1395/11
"In addition, It would be very nice to see the capability for appending trigger captures, which would help this gentleman. If you had a trigger condition which happens once every 12 hours over a weekend, you would want to capture 5 seconds or 10mS before the event and 1 sec after the event and then go to sleep until the next trigger. So, when you come in 3 days later, you have only 20 seconds of data and 5 events clipped in front of you."

Tim

(#66622)
"in the loop mode when the event of interest occurred the LA can overwrite the event. To fix the problem, the user sets an acquisition period. When the LA is triggered, the LA collects data until the end of the period. If a trigger occurs within the time period, the period timer resets to zero, resulting in the acquisition continuing uninterrupted
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the default triggers were not suitable for an undefine events which occur once a week. It turned out that two CAN Frame are received at the same time, stopping the CAN transmission."

Tim

(#67007)
"Hi. I'm working with a soft real time processor communicating with a ADC that triggers a IRQ every 1ms.
How ever as the processor is running a soft realtime system I need to be able to trigger if I miss a IRQ from the ADC.

Curretly Im partially successfull with falling edge on GP1n (when my processor interrupt routine is executed) and if nIRQ is high.

How ever best would be if I could define it as "Falling Edge GP1n + no fallinge edge on GP1n for 2ms). This would give me the position of a missed irq from the ADC..."

Tim

discuss.saleae.com/t/show-bus-value/1001/5
"We are also capturing data from an 8-bit port.
For us, a useful feature would be logical operators on the trigger. In our case, trigger on nWR (not write) OR nOE (not output enable). So an OR of 2 channels would be good."

Tim

Request to improve trigger view to allow more advanced filtering.

discuss.saleae.com/t/protocol-trigger-with-custom-analyzer/1212
"will it only trigger on a pattern match? Or can you apply some Boolean logic? For example, I would like it to trigger on any value above 48."

Tim

Support One-Shot Triggering Based on Protocol / HLA Result. Stop the capture once protocol / HLA match is found.

discuss.saleae.com/t/is-it-possible-to-trigger-on-custom-high-level-analyzer/1201
This is a different use case since it would be running (maybe for days) until an error is detected using my custom HLA then trigger and stop running. Good to have on the feature request.

Tim

I think this idea is great! I changed the title to better help us keep track of this request. I also plan to merge a few similar requests here, as I'd like to consolidate all ideas around digital trigger improvements.

Tim

For example: Trigger on parity error

Tim

Merged with: Trigger on Protocol Error

Tim

(#58269)
"I have an RS-485 bus that infrequently produces errors. I would like to set up to capture data (unmonitored) and stop when it encounters an error so that I can analyze the problem with my system."

Tim

(#58277)
"is there a way to stop capturing comm data via a parity error? I want to capture a parity error that only happens 2 or 3 times a day."

Morten

This could be achieved by having "virtual channels" that are defined using Boolean (on digital) or arithmetic (on analog analog) Expressions.
A trigger could then be added to the virtual channel