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Analyzer states meaningful identification

When using, for example, parallel state analyzers with many states, it would be a great improvement to be able to name the different states.  suggested way would be to offer th epossibility of filling a "state table" that would give meaningful alphanumeric identification to desired values for each analyzer.

Software debugging using parallel analyzers in a logic analyzer is a very efficient way to debug real-time software with real-time inputs. One has to use available outputs to make up the clock(s) and the data used by a parallel analyzer.

  • Guest
  • Sep 8 2018
  • Needs review