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Process analog channels to digital


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Collin Kidder

Some inputs are analog but have a discrete mapping to digital. Two examples would be odd CAN bus signals that don't trigger the digital inputs properly or isoSPI which actually is SPI but over an analog physical representation. In both cases the analog signal could be turned into a digital signal. It would be handy to be able to do this and then have the already existing digital analyzers process this new digital information. Currently the SDK allows digital analyzers to create a simulation of signals. Perhaps this same interface could be used such that one reads in analog data and turns it into simulation data on another channel thus pushing digital data to one channel from analog data in another? This might not require a lot of SDK modification if analog readings were added to the SDK. But, that's just a wild idea.

A

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Tim

discuss.saleae.com/t/possible-to-modify-analog-data-and-redo-adc/2622
"I captured a UART (async serial) signal on a channel (both digital and analog) and noticed some noise in the analog signal that is affecting the digital signal (showing it being high when it should be low). Is there a way to modify the capture file and alter the analog signal, then recreate the digital signal with the new analog (i.e., re-do analog to digital conversion)?"


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Tim

(#84082)
"For unknown DUTs I would rather only record pure analog files and make all analysis later. What I am looking for is something like 1) Select A00 2) set with 1.8V 3) create D00? Is there a way to achieve this?"


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Tim

(#74725)
"Currently we are facing problem during analysis of CAN protocol.
We are getting proper waveform and bus data on oscilloscope but unable to get same data on your product (logic pro 8)."
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Some background info - their CAN_L signal swings from 2.5V to 1.5V. This swing is not enough to cleanly cross our voltage threshold specification. Therefore, a feature like this would be helpful to allow users to set their own voltage threshold and convert their analog signal to digital.


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Tim

This use case *could* be solved via processing analog channels to digital.

(#71031)
"Hi there, I'm developing a low level analyzer for a protocol to use with the Saleae Logic software. The protocol I'm using has a digital channel and an analogue channel, and they are both required to be analyzed. I've got the digital part working fine using the AnalyzerSDK. However I can't see in the documentation any mention or any example of an analyzer working on top of an analogue channel. Is this possible? If so, is there anything I could use (API, example, where to start) ? Any function that would allow me to get the analogue value of that channel at the current sample?"
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"I would rather have a way to directly obtain an analogue reading via the SDK (similarly to the function GetBitState)"


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Tim

Another person mentioned their need for this feature below, as well as their use case for it:
discuss.saleae.com/t/logic-analysis-on-analog-waveforms/844


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__AW

I have a circumstance where this would be very helpful. I have a serial signal through an opto-isolator. The Logic 8 logic high level seems to change at about 0.9V. The processor receiving the signal is a Schmidt trigger input and sees high at 2.6V. Since the rise rate is a bit slow on this signal the Logic's digital signal does not really represent what the processor input is seeing. I don't know if this could be accomplished through some sort of extension? Being able to basically choose the voltage for high and low logic levels on an analog signal and convert that to a virtual digital signal?


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using a hysteresis to create a virtual digital channel where the rest of the application can use equal to a normal digital channel would be a decent solution.


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Peter Jaquiery

A third example is the Manchester encoded PD traffic on the CC lines of a USB-C system. The signalling levels are about 1V swing and offset that is a function of voltage drop across the ground return between the two communicating devices.

A fourth example (class) is any system where there are mixed logic levels. Anyone still using ECL?